NXP Flash MCU to Atmel Flash MCU Cross Reference. 07/01/ 86KB. NXP Flash MCU to Atmel Flash MCU Devices, Non-Direct Replacements. 07/01/ The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and. 89C55 datasheet, 89C55 circuit, 89C55 data sheet: ATMEL – 8-Bit Microcontroller with 20K Bytes Flash,alldatasheet, datasheet, Datasheet search site for.
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In addition, the AT89C55 is designed with static logic for operation down to zero frequency and sup- ports two software selectable power 89c55 modes. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use bit addresses MOVX DPTR. Search field Part name Part description.
At89c55-24jc Atmel IC Microcontroller 8-bit 44 Pin PLCC MCU 89c55-24jc
Port 1 also receives the low-order address bytes during Flash programming and verification. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. When 1s are written to port 0 pins, the pins can be used as high- impedance inputs. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.
Read accesses to these addresses will in general return random data, and write accesses will have an indetermi- nate effect. As inputs, Port 2 pins that are externally being pulled low will source atjel I. INT1 external interrupt 1. The upper bytes occupy a parallel address space to the Special Function Registers. In this application, Port 2 uses strong internal pul- lups when emitting 1s.
When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be 899c55 as inputs.
AT89C55WD – Microcontrollers and Processors – Microcontrollers and Processors
By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C55 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. User software should not write 895c5 to these unlisted loca- tions, since they may be used in future products to invoke new features.
External pullups are required during program verifica- tion. Otherwise, the pin is weakly pulled high. Note that stack operations are examples of indirect addressing, so the upper bytes of data RAM are avail- able as stack space. Interrupt Registers The individual interrupt enable bits are in the IE register.
Instructions that use indirect addressing access the upper bytes of RAM. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
INT0 external interrupt 0.
EA should be strapped to V. Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented on the chip. Port 0 also receives the code bytes during Flash program- ming and outputs the code bytes during program verifica- tion.
89C55 Datasheet pdf – 8-Bit Microcontroller with 20K Bytes Flash – Atmel
Port 3 also receives the highest-order address bit and some control signals for Flash programming and verifica- tion. XTAL2 Output from the inverting oscillator amplifier. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs.
As inputs, Port 3 pins that are externally being pulled low atmek source current I. Two priorities can be set for each of the six interrupt sources in the IP register. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. Note, however, that one ALE pulse is skipped during each access to external data mem- ory.
Three-Level Program Memory Lock. T0 timer 0 external input. In that case, the reset or inactive values of the new bits will always be 0. Port 3 also serves the functions of various special features of the AT89C55, as shown in the following table.
The device is manu- factured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and pinout. T1 timer 1 external input. RXD serial input port. A high on this pin for two machine cycles while the oscillator is running resets the device. Instructions that use direct addressing access SFR space. This pin also receives the volt programming enable volt- age V. TXD serial output port. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.
For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 whose address is 0A0H.
The Power Down Mode saves the RAM con- tents but freezes the oscillator, disabling all other chip func- tions until the next hardware reset.
In this mode, P0 has internal pul- lups.
As inputs, Port 1 pins that are externally being pulled low will source current I. The AT89C55 provides the following standard features: The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.
The low-voltage option saves power and operates with a 2. RD external data memory 89v55 strobe.